1. Field of the Invention
The present invention relates to manufacturing of semiconductor components and more specifically of MOS transistors in a silicon substrate.
2. Discussion of the Related Art
Currently, MOS transistors manufactured on a silicon substrate have polysilicon gates separated from the substrate by a thin silicon oxide layer. It is known that the threshold voltage of MOS transistors especially depends on the nature of the material forming the conductive gate above this thin silicon oxide layer. Especially, the fact of providing as a gate material germanium or a mixture Si.sub.1-x Ge.sub.x of silicon and germanium, with x&gt;50%, heavily doped of type P, is known to allow obtaining N-channel and P-channel MOS transistors, the threshold voltages of which are close to 0.6 volt.
However, the implementation of such Si.sub.1-x Ge.sub.x -gate transistors raises various practical problems. One of these is that germanium and/or mixtures of germanium and silicon with a high germanium content are difficult to deposit on silicon oxide and that rough and irregular surfaces are obtained. Further, GeH.sub.x radicals, present in the chemical vapor deposition process (CVD) performed in presence of silane and germane, are very reactive and strongly reductive and therefore there is a risk of etching the surface of the thin gate insulation layer, whereby this layer, after deposition, no longer has the desired electric qualities and/or has an irregular thickness.